MASM Lab Papers

  1. Chong, C.S., Lendermann, P., Gan, B.P., Duarte, B.M., Fowler, J.W., and Callarman, T.E., “Development and Analysis of a Customer Demand Driven Semiconductor Supply Chain Model using High Level Architecture (HLA)”, International Journal of Simulation and Process Modeling, to appear.
  2. Delp, D., Si, J., Hwang, Y., Pei, B., and Fowler, J., “Availability Adjusted X- Factor”, International Journal of Production Research, Vol. 43, No. 18, pp. 3933–3953, 2005.
  3. Mönch, L., Schabacker, R., Pabst, D., and Fowler, J.W., “Genetic Algorithm-Based Subproblem Solution Procedures for a Modified Shifting Bottleneck Heuristic for Complex Job Shops”, European Journal of Operational Research, to appear.
  4. Kim, B., Gel, E.S., Fowler, J.W., Carlyle, W.M., and Wallenius, J. “Evaluation of Nondominated Solution Sets for K-Objective Optimization Problems: An Exact Method and Approximations”, European Journal of Operational Research, to appear.
  5. Kim, B., Gel, E.S., Fowler, J.W., Carlyle, W.M., and Wallenius, J. “Evaluation of Nondominated Solution Sets for K-Objective Optimization Problems: An Exact Method and Approximations”, European Journal of Operational Research, to appear.
  6. Mason, S.J., Fowler, J.W., Carlyle, W.M., and Montgomery, D.C., “Heuristics for Minimizing Total Weighted Tardiness in Complex Job Shops”, International Journal of Production Research, Vol. 43, No. 10, pp. 1943-1963, 2005.
  7. Diaz, S., Fowler, J.W., Pfund, M.E., Mackulak, G.T., and Hickie, M., "Evaluating the Impacts of Reticle Requirements in Semiconductor Wafer Fabrication", IEEE Transactions on Semiconductor Manufacturing, to appear.
  8. Mönch, L., Balasubramanian, H., Fowler, J.W., and Pfund, M.E., “Heuristic Scheduling of Jobs on Parallel Batch Machines with Incompatible Job Families and Unequal Ready Times”, Computers and Operations Research, Vol. 32, No. 11, pp. 2731-2750, 2005.   
  9. Park, Y., Montgomery, D.C., Fowler, J.W., and Borror, C.M., “Cost-Constrained G-Efficient Response Surface Designs for Cuboidal Regions”, Quality and Reliability Engineering International, to appear. 
  10. Mackulak, G., Fowler, J., Park, S., and McNeill, J.E. "A Three Phase Simulation Methodology for Generating Accurate and Precise Cycle Time-Throughput Curves", International Journal of Simulation and Process Modeling, Vol. 1, Nos. 1/2, pp. 36-47, 2005. 
  11. Fowler, J.W., Kim, B., Carlyle, W.M., Gel, E.S., and Horng, S.-M., “Evaluating A Posteriori Solution Techniques for Bi-Criteria Parallel Machine Scheduling Problems”, Journal of Scheduling, Vol. 8, No. 1, pp. 75-96, 2005.  
  12. Perez, I., Fowler, J.W., and Carlyle, W.M., “Minimizing Total Weighted Tardiness on a Single Batch Processing Machine with Incompatible Job Families”, Computers and Operations Research, Vol. 32, No.2, pp. 327-341, 2005.   
  13. Fowler, J. and Rose, O., “Grand Challenges in Modeling and Simulation of Complex Manufacturing Systems”, Simulation: Transactions of the Society for Computer Simulation International, Vol. 80, No. 9, pp. 469-476, 2004.  
  14. Pfund, M.E., Fowler, J.W., and Gupta, J., “A Survey of Algorithms for Single and Multi-Objective Unrelated Parallel Machine Deterministic Scheduling Problems”, Journal of the Chinese Institute of Industrial Engineers, Vol. 21, No. 3, pp. 230-242, 2004.  
  15. Balasubramanian, H., Mönch, L., Fowler, J.W., and Pfund, M.E., “Genetic Algorithm Based Scheduling of Parallel Batch Machines with Incompatible Job Families to Minimize Total Weighted Tardiness”, International Journal of Production Research, Vol. 42, No. 8, 1621-1638, 2004.  
  16. Fowler, J.W., Horng, S-M, and Cochran, J.K., “A Hybridized Genetic Algorithm to Solve Parallel Machine Scheduling Problems with Sequence Dependent Setups”, International Journal of Industrial Engineering – Theory, Applications, and Practice, Vol. 10, No. 3, 232-243, 2003.  
  17. Carlyle, W.M., Fowler, J.W., Gel, E., and Kim, B.,  “Quantitative Comparison of Approximate Solution Sets for Bi-criteria Optimization Problems”, Decision Sciences, Vol. 34, No. 1, pp. 63-82, 2003.  
  18. Greiner, M.A., Fowler, J.W., Shunk, D.L., Carlyle, W.M., and McNutt, R.T., “A Hybrid Approach Using the Analytic Hierarchy Process and Integer Programming to Screen Weapon Systems Projects”, IEEE Transactions on Engineering Management, Vol. 50, No. 2, pp. 192-203, 2003.  
  19. Dabbas, R.M. and Fowler, J.W., “A New Scheduling Approach Using Combined Dispatching Criteria in Semiconductor Manufacturing Systems”, IEEE Transactions on Semiconductor Manufacturing, Vol. 16, No. 3, pp. 501-510, 2003.  
  20. Cochran, J.K, Horng, S-M, and Fowler, J.W., "A Multi-Population Genetic Algorithm to Solve Multi-Objective Scheduling Problems for Parallel Machines", Computers and Operations Research, Vol. 30, No. 7, pp. 1087-1102, 2003.
  21. Dabbas, R. M., Fowler, J.W., Rollier, D.A., and McCarville, D., "Multiple Response Optimization Using Mixture Designed Experiments and Desirability Function in Semiconductor Scheduling", International Journal of Production Research, Vol. 41, No. 5, pp. 939-961, 2003.
  22. Phojanamongkolkij, N., Fowler, J.W., and Cochran, J.K., "Determining 'Optimal' Policies for Batch-Processing Machines of a Wafer Fabrication Facility", Journal of Manufacturing Systems, Vol. 21, No. 5, pp. 363-379, 2002.
  23. Fowler, J.W., G.L.Hogg., and S.J. Mason., "Workload Control in the Semiconductor Industry", Production Planning and Control Special Issue on Workload Control, Vol. 13, No. 7, pp. 568-578, 2002.
  24. Mackulak, G.T., Park, S., Keats, J.B., and Fowler, J.W., "A Sequential Stopping Rule for Steady State Simulation Based on Time Series Forecasting", Transactions of the Society for Computer Simulation International, Vol. 78, No. 11, pp. 643-654, 2002.
  25. Skinner, K.R., Montgomery, D.C., Runger, G.R., Fowler, J.W., McCarville, D.R., Rhoads, T.R., and Stanley, J.D., "Multivariate Statistical Methods for Modeling and Analysis of Wafer Probe Test Data", IEEE Transactions on Semiconductor Manufacturing, Vol. 15, No. 4, 2002, pp. 523-530.
  26. Park, S., Fowler, J.W., Mackulak, G.T., Keats, J.B., and Carlyle, W.M., "D-Optimal Sequential Experiments for Generating a Simulation-Based Cycle Time-Throughput Curve", Operations Research, Vol. 50, No. 6, 2002, pp. 981-990.
  27. Perry, L. A., Montgomery, D. C., and Fowler, J. W., "Partition Experimental Designs for Sequential Processes: Part II - Second-Order Models", Quality and Reliability Engineering International, Vol. 18, No. 5, 2002, pp. 373-382.
  28. Yu, L., Shih, H.M., Pfund, M., Carlyle, W.M., and Fowler, J.W., "Scheduling of Unrelated Parallel Machines: An Application to PWB Manufacturing", IIE Transactions on Scheduling and Logistics, Vol. 34, No. 11, 2002, pp. 921-931.
  29. Solomon, L., Fowler, J., Pfund, M., and Jensen, P., "The Inclusion of Future Arrivals and Downstream Setups into Wafer Fabrication Batch Processing Decisions", Journal of Electronics Manufacturing, Vol. 11, No. 2, 2002, pp. 149-159.
  30. Mason, S.J., Fowler, J.W., and Carlyle, W.M., "A Modified Shifting Bottleneck Heuristic for Minimizing the Total Weighted Tardiness in a Semiconductor Wafer Fab", Journal of Scheduling, Vol. 5, No. 3, 2002, pp. 247-262.
  31. Fowler, J.W., Phojanamongkolkij, N., Cochran, J.K., and Montgomery, D.C., "Optimal Batching in a Wafer Fabrication Facility Using a Multi-Product G/G/c Model with Batch Processing", International Journal of Production Research, Vol. 40, No. 2, 2002, pp. 275-292.
  32. Pfund, M., Yu, L., Fowler, J., and Carlyle, W., "The Effects Of Processing Time Variability And Equipment Downtimes On Various Scheduling Approaches For A Printed Wiring Board Assembly Operation", Journal of Electronics Manufacturing, Vol. 11, No. 1, 2002, pp. 19-31.
  33. Perry, L. A., Montgomery, D. C., and Fowler, J. W., "Partition Experimental Designs for Sequential Processes: Part I - First-Order Models", Quality and Reliability Engineering International, Vol. 17, No. 6, 2001, pp. 429-438.
  34. Carlyle, W.M, Knutson, K., and Fowler, J.W., "Bin Covering Algorithms in the Second Stage of the Lot to Order Matching Problem", Journal of the Operational Research Society, Vol. 52, No. 11, 2001, pp. 1232-1243.
  35. Fowler, J.W., Park, S., Mackulak, G.T., and Shunk, D. L., "Efficient Cycle Time-Throughput Curve Generation Using a Fixed Sample Size Procedure", International Journal of Production Research, Vol. 39, No. 12, 2001, pp. 2595-2613.
  36. Dabbas, R.M., Chen, H.-N., Fowler, J.W., and Shunk, D.L., "A Combined Dispatching Approach to Scheduling Semiconductor Manufacturing Systems", Computers and Industrial Engineering, Vol. 39, 2001, pp. 307-324.
  37. Mackulak, G.T., Savory, P.A., "A Simulation Based Experiment for Comparing AMHS Performance in a Semiconductor Fabrication Facility", IEEE Transactions on Semiconductor Manufacturing, Vol. 14, No. 3, August 2001, pp. 273-280.
  38. Fowler, J.W., Knutson, K., and Carlyle, W.M., "Comparison and Evaluation of Lot-To-Order Matching Policies for a Semiconductor Assembly and Test Facility", International Journal of Production Research, Vol. 38, No. 8, 2000, pp. 1841-1853.
  39. Paprotny, I., Shiau, J., Huh, Y., and Mackulak, G.T., "A Simulation Based Comparison of Semiconductor AMHS Alternatives: Continuous Flow vs. Overhead Hoist", Proceedings of the Winter Simulation Conference 2000, Orlando, FL, December 2000, pp. 1333-1337.
  40. Colvin, T.D., Hennessy, L.S., and Mackulak, G.T., "Semiconductor Layout Alternatives Enabled by Modular Fab Design Concepts and AMHS Linkage", Proceedings of ASCE 2000, ISBN: 0-7844-0475-5, February 2000, pp. 727-736.
  41. Paprotny, I., Yngve, J., Mackulak, G.T., and Gaskins, B., "Applying Conservative Distributed Simulation to a Large Scale Automated Material Handling Design", Proceedings of the Communication Networks and Distributed Systems Modeling and Simulation (CNDS) Conference WMC 2000, January 2000, pp. 107-112.
  42. Colvin, T., Hennesey, L., and Mackulak, G.T., "Material Logistics System Analysis, Design, Layout, and Simulation Necessary to be I300I Factory Guideline Compliant", Future Fab International, January 2000, pp. 95-100.
  43. Fowler, J.W., G.L.Hogg., and D.T.Phillips., "Control of Multiproduct Bulk Server Diffusion/Oxidation Processes Part Two: Multiple Servers", IIE Transactions on Scheduling and Logistics; Vol. 32, No. 2,2000, pp. 167-176.
  44. Wu, S., Rayter, J., Paprotny, I., Mackulak, G.T., and Yngve, J., "Increasing First Pass Accuracy of AMHS Simulation Output Using Legacy Data", Proceedings of the Winter Simulation Conference '99, December 1999, pp. 784-789.
  45. Paprotny, I., Zhao, W., and Mackulak, G.T., "Reducing Model Creation Cycle Time by Automated Conversion of a CAD AMHS Layout Design", Proceedings of the Winter Simulation Conference '99, December 1999, pp. 779-783.
  46. Runger, G.C., and J W.Fowler., "Control Charts from Anova Partitions: Contrasts and Hierarchies", Quality and Reliability Engineering International, Vol. 14, 1998, pp. 1-12.
  47. Knutson, K., K Kempf., J W Fowler.,and M Carlyle.,"Lot-to-order matching for a semiconductor assembly & test facility",IIE Transactions on Scheduling and Logistics, Vol. 31, No. 11, 1999, pp. 1103-1111.
  48. Fowler, J.W., J.K.Cochran., and S-M.Horng.,"A Group-Technology-Coded Literature Review of Semiconductor Manufacturing Publications",The MASMLAB Bibliography Web Site",IEEE Transactions on Semiconductor Manufacturing, Vol. 12, No. 2, 1999, pp. 259-263.
  49. Fowler, J.W.,R.A.Aguilar., and C.A.Flores., "A Simulation Methodology for Evaluating the Impact of Layout on the performance of Assembly/Packaging/Test Operations",Submitted to IEEE Transactions on Components,Packaging and Manufacturing Technology,Part C:Manufacturing,August 08, 1997.
  50. Montgomery, D.C., J.B.Keats., J.W. Fowler, G.C.Runger., and G.Rajavelu., "Statistical Monitoring Techniques For Contamination Data",Journal of the Institute of Environmental Sciences, Vol.40,No.2,1997,pp.23-30.
  51. Robinson,J., J.W.Fowler., and J.Bard., "The Use of Upstream and Downstream Information in Scheduling Semiconductor Batch Operations", International Journal of Production Research, Vol.33,No.7,1995,pp.1849-1870.
  52. Duenyas,I., J.W.Fowler., and L.W.Schruben., "Planning and Scheduling in Japanese Semiconductor Manufacturing", Journal of Manufacturing Systems,Vol.13,No.5,1994,pp.323-332.
  53. Fowler,J.W.,D.T.Philips., and G.L.Hogg.,"Control of Multiproduct Bulk Server Diffusion/Oxidation Processes",IEE Transactions , Vol.24,No.4,1992,pp 84-96.
  54. Wilhelm,W.E. and J.W.Fowler., "Workshop on Electronics Manufacturing Research",IIE Transactions,Vol.24,No.4,1992,pp.6-17.
  55. Fowler,J.W.,D.T.Philips.,and G.L.Hogg., "Real Time Control of Multiproduct BulkService Semiconductor Manufacturing Processes", IEEE Transactions on Semiconductor Manufacturing,Vol.5,No.2,1992,pp.158-163.
  56. Robinson,J., L.W.Schruben., and J.W.Fowler., "Experimenting with Large-Scale Semiconductor Manufacturing Simulations:A Frequency Domain Approach to Factor Screening",Proceedings of the First IE Research Conference,LosAngeles,CA,May 26-27,1993,pp.112-116.
  57. Klutke,G.A., M.Kammer-kerwick., and J.W.Fowler., "Stochastic Control of Wafer Fabrication Processes in Semiconductor Manufacturing",Proceedings of the First IE Research Conference,Chicago,IL,May 20-21,1992,pp.449-453.
  58. Fernando, E., Fowler, J.W., and Scullion, T., "Evaluation of RAMS-DO1 as a Tool for Project Programming",Transportation Research Record,No. 1262, 1990, pp. 105-115.